Register Space - 1.2 English

Multi-Scaler LogiCORE IP Product Guide (PG325)

Document ID
PG325
Release Date
2023-12-20
Version
1.2 English

The Video Multi-Scaler IP has specific registers that allow you to control the operation of the core. All registers have an initial value of 0.

The following table provides a detailed description of all the registers that apply globally to the IP.

Table 1. Register Address Space
Address (hex) BASEADDR+ Register Name Access Type Register Description
0x0000 Control Signals R/W/COH 1 Bit[0] = ap_start
R/W/COR 2 Bit[1] = ap_done
R/W Bit[2] = ap_idle
Bit[3] = ap_ready
Bit[7] = auto_restart
Others = Reserved
0x00004 Global Interrupt Enable R/W Bit[0] = Global interrupt enable
Others = Reserved
0x00008 IP Interrupt Enable R/W Bit[0] = Channel 0 (ap_done)
Bit[1] = Channel 1 (ap_ready)
Others = reserved
0x0000C IP Interrupt Status Register R/TOW 3 Bit[0] = Channel 0 (ap_done)
Bit[1] = Channel 1 (ap_ready)
Others = Reserved
0x00010 Number of outs R/W Bit[7] to Bit[0]=Programmable
Others = Reserved
0x00100 Width In 0 R/W Bit[15] to Bit[0]=Programmable
Others = Reserved
0x00108 Width Out 0 R/W Bit[15] to Bit[0]=Programmable
Others = reserved
0x00110 Height In 0 R/W Bit[15] to Bit[0]=Programmable
Others = Reserved
0x00118 Height Out 0 R/W Bit[15] to Bit[0]=Programmable
Others = Reserved
0x00120 Line rate for output 0 R/W Bit[31] to Bit[0]=Programmable
0x00128 Pixel rate for output 0 R/W Bit[31] to Bit[0]==Programmable
0x00130 Pixel format In 0 R/W Bit[7] to Bit[0] ==Programmable
Others = Reserved
0x00138 Pixel format Out 0 R/W Bit[7] to Bit[0]=Programmable
Others = Reserved
0x00150 Stride In 0 R/W Bit[15] to Bit[0]=Programmable
Others = Reserved
0x00158 Stride Out 0 R/W Bit[15] to Bit[0]=Programmable
Others = Reserved
0x00160 Address offset of plane 0 of Input 0 R/W Bit[31] to Bit[0]=Programmable
0x00170 Address offset of plane 1 of Input 0 R/W Bit[31] to Bit[0]=Programmable
0x00190 Address offset of plane 0 of Output 0 R/W Bit[31] to Bit[0]=Programmable
0x00200 Address offset of plane 1 of Output 0 R/W Bit[31] to Bit[0]=Programmable
0x00300 Width In 0 R/W Bit[15] to Bit[0]=Programmable
Others = Reserved
0x00308 Width Out 0 R/W Bit[15] to Bit[0] =Programmable
Others = reserved
0x00310 Height In 1 R/W Bit[15] to Bit[0] =Programmable
Others = Reserved
0x00318 Height Out 1 R/W Bit[15] to Bit[0] =Programmable
Others = Reserved
0x00320 Line rate for output 1 R/W Bit[31] to Bit[0] =Programmable
0x00328 Pixel rate for output 1 R/W Bit[31] to Bit[0] =Programmable
0x00330 Pixel format In 1 R/W Bit[7] to Bit[0] =Programmable
Others = Reserved
0x00338 Pixel format Out 1 R/W Bit[7] to Bit[0]=Programmable
Others = Reserved
0x00350 Stride In 1 R/W Bit[15] to Bit[0]=Programmable
Others = Reserved
0x00358 Stride Out 1 R/W Bit[15] to Bit[0]=Programmable
Others = Reserved
0x00360 Address offset of Plane 0 of Input 1 R/W Bit[31] to Bit[0] =Programmable
0x00370 Address offset of Plane 1 of Input 1 R/W Bit[31] to Bit[0]=Programmable
0x00390 Address offset of Plane 0 of Output 1 R/W Bit[31] to Bit[0]=Programmable
0x00400 Address offset of Plane 1 of Output 1 R/W Bit[31] to Bit[0]=Programmable
0x00500 Width In 2 R/W Bit[15] to Bit[0] =Programmable
Others = Reserved
0x00508 Width Out 2 R/W Bit[15] to Bit[0]=Programmable
Others = reserved
0x00510 Height In 2 R/W Bit[15] to Bit[0]=Programmable
Others = Reserved
0x00518 Height Out 2 R/W Bit[15] to Bit[0]=Programmable
Others = Reserved
0x00520 Line rate for output 2 R/W Bit[31] to Bit[0]=Programmable
0x00528 Pixel rate for output 2 R/W Bit[31] to Bit[0] =Programmable
0x00530 Pixel format In 2 R/W Bit[7] to Bit[0]=Programmable
Others = Reserved
0x00538 Pixel format Out 2 R/W Bit[7] to Bit[0]=Programmable
Others = Reserved
0x00550 Stride In 2 R/W Bit[15] to Bit[0]=Programmable
Others = Reserved
0x00558 Stride Out 2 R/W Bit[15] to Bit[0] =Programmable
Others = Reserved
0x00560 Address offset of Plane 0 of Input 2 R/W Bit[31] to Bit[0]=Programmable
0x00570 Address offset of Plane 1 of Input 2 R/W Bit[31] to Bit[0]=Programmable
0x00590 Address offset of Plane 0 of Output 2 R/W Bit[31] to Bit[0]=Programmable
0x00600 Address offset of Plane 1 of Output 2 R/W Bit[31] to Bit[0]=Programmable
0x00700 Width In 3 R/W Bit[15] to Bit[0]=Programmable
Others = Reserved
0x00708 Width Out 3 R/W Bit[15] to Bit[0]=Programmable
Others = reserved
0x00710 Height In 3 R/W Bit[15] to Bit[0]=Programmable
Others = Reserved
0x00718 Height Out 3 R/W Bit[15] to Bit[0]=Programmable
Others = Reserved
0x00720 Line rate for output 3 R/W Bit[31] to Bit[0]=Programmable
0x00728 Pixel rate for output 3 R/W Bit[31] to Bit[0]=Programmable
0x00730 Pixel format In 3 R/W Bit[7] to Bit[0]=Programmable
Others = Reserved
0x00738 Pixel format Out 3 R/W Bit[7] to Bit[0]=Programmable
Others = Reserved
0x00750 Stride In 3 R/W Bit[15] to Bit[0]=Programmable
Others = Reserved
0x00758 Stride Out 3 R/W Bit[15] to Bit[0]=Programmable
Others = Reserved
0x00760 Address offset of Plane 0 of Input 3 R/W Bit[31] to Bit[0]=Programmable
0x00770 Address offset of Plane 1 of Input 3 R/W Bit[31] to Bit[0]=Programmable
0x00790 Address offset of Plane 0 of Output 3 R/W Bit[31] to Bit[0]=Programmable
0x00800 Address offset of Plane 1 of Output 3 R/W Bit[31] to Bit[0] =Programmable
0x00900 Width In 4 R/W Bit[15] to Bit[0] =Programmable
Others = Reserved
0x00908 Width Out 4 R/W Bit[15] to Bit[0] =Programmable
Others = reserved
0x00910 Height In 4 R/W Bit[15] to Bit[0]=Programmable
Others = Reserved
0x00918 Height Out 4 R/W Bit[15] to Bit[0]=Programmable
Others = Reserved
0x00920 Line rate for output 4 R/W Bit[31] to Bit[0]=Programmable
0x00928 Pixel rate for output 4 R/W Bit[31] to Bit[0]=Programmable
0x00930 Pixel format In 4 R/W Bit[7] to Bit[0]=Programmable
Others = Reserved
0x00938 Pixel format Out 4 R/W Bit[7] to Bit[0] =Programmable
Others = Reserved
0x00950 Stride In 4 R/W Bit[15] to Bit[0]=Programmable
Others = Reserved
0x00958 Stride Out 4 R/W Bit[15] to Bit[0]=Programmable
Others = Reserved
0x00960 Address offset of Plane 0 of Input 4 R/W Bit[31] to Bit[0]=Programmable
0x00970 Address offset of Plane 1 of Input 4 R/W Bit[31] to Bit[0]=Programmable
0x00990 Address offset of Plane 0 of Output 4 R/W Bit[31] to Bit[0]=Programmable
0x01000 Address offset of Plane 1 of Output 4 R/W Bit[31] to Bit[0]=Programmable
0x01100 Width In 5 R/W Bit[15] to Bit[0]=Programmable
Others = Reserved
0x01108 Width Out 5 R/W Bit[15] to Bit[0]=Programmable
Others = reserved
0x01110 Height In 5 R/W Bit[15] to Bit[0] =Programmable
Others = Reserved
0x01118 Height Out 5 R/W Bit[15] to Bit[0] =Programmable
Others = Reserved
0x01120 Line rate for output 5 R/W Bit[31] to Bit[0]=Programmable
0x01128 Pixel rate for output 5 R/W Bit[31] to Bit[0]=Programmable
0x01130 Pixel format In 5 R/W Bit[7] to Bit[0]=Programmable
Others = Reserved
0x01138 Pixel format Out 0 R/W Bit[7] to Bit[0]=Programmable
Others = Reserved
0x01150 Stride In 5 R/W Bit[15] to Bit[0] =Programmable
Others = Reserved
0x01158 Stride Out 5 R/W Bit[15] to Bit[0]=Programmable
Others = Reserved
0x01160 Address offset of Plane 0 of Input 5 R/W Bit[31] to Bit[0]=Programmable
0x01170 Address offset of Plane 1 of Input 5 R/W Bit[31] to Bit[0] =Programmable
0x01190 Address offset of Plane 0 of Output 5 R/W Bit[31] to Bit[0]=Programmable
0x01200 Address offset of Plane 1 of Output 5 R/W Bit[31] to Bit[0]=Programmable
0x01300 Width In 6 R/W Bit[15] to Bit[0]=Programmable
Others = Reserved
0x01308 Width Out 6 R/W Bit[15] to Bit[0]=Programmable
Others = reserved
0x01310 Height In 6 R/W Bit[15] to Bit[0]=Programmable
Others = Reserved
0x01318 Height Out 6 R/W Bit[15] to Bit[0]=Programmable
Others = Reserved
0x01320 Line rate for output 6 R/W Bit[31] to Bit[0]=Programmable
0x01328 Pixel rate for output 6 R/W Bit[31] to Bit[0]=Programmable
0x01330 Pixel format In 6 R/W Bit[7] to Bit[0] =Programmable
Others = Reserved
0x01338 Pixel format Out 6 R/W Bit[7] to Bit[0]=Programmable
Others = Reserved
0x01350 Stride In 6 R/W Bit[15] to Bit[0]=Programmable
Others = Reserved
0x01358 Stride Out 6 R/W Bit[15] to Bit[0] =Programmable
Others = Reserved
0x01360 Address offset of Plane 0 of Input 6 R/W Bit[31] to Bit[0]=Programmable
0x01370 Address offset of Plane 1 of Input 6 R/W Bit[31] to Bit[0] =Programmable
0x01390 Address offset of Plane 0 of Output 6 R/W Bit[31] to Bit[0] =Programmable
0x01400 Address offset of Plane 1 of Output 6 R/W Bit[31] to Bit[0] =Programmable
0x01500 Width In 7 R/W Bit[15] to Bit[0]=Programmable
Others = Reserved
0x01508 Width Out 7 R/W Bit[15] to Bit[0]=Programmable
Others = reserved
0x01510 Height In 7 R/W Bit[15] to Bit[0] =Programmable
Others = Reserved
0x01518 Height Out 7 R/W Bit[15] to Bit[0]=Programmable
Others = Reserved
0x01520 Line rate for output 7 R/W Bit[31] to Bit[0]=Programmable
0x01528 Pixel rate for output 7 R/W Bit[31] to Bit[0] =Programmable
0x01530 Pixel format In 7 R/W Bit[7] to Bit[0] =Programmable
Others = Reserved
0x01538 Pixel format Out 7 R/W Bit[7] to Bit[0] =Programmable
Others = Reserved
0x01550 Stride In 7 R/W Bit[15] to Bit[0] =Programmable
Others = Reserved
0x01558 Stride Out 7 R/W Bit[15] to Bit[0]=Programmable
Others = Reserved
0x01560 Address offset of Plane 0 of Input 7 R/W Bit[31] to Bit[0]=Programmable
0x01570 Address offset of Plane 1 of Input 7 R/W Bit[31] to Bit[0] =Programmable
0x01590 Address offset of Plane 0 of Output 7 R/W Bit[31] to Bit[0] =Programmable
0x01600 Address offset of Plane 1 of Output 7 R/W Bit[31] to Bit[0] =Programmable
0x02000 Vertical filter coefficients address for Output 0 R/W Bit[31] to Bit[0]=Programmable
0x02800 Horizontal filter coefficients address for Output 0 R/W Bit[31] to Bit[0]=Programmable
0x04000 Vertical filter coefficients address for Output 1 R/W Bit[31] to Bit[0]=Programmable
0x04800 Horizontal filter coefficients address for Output 1 R/W Bit[31] to Bit[0]=Programmable
0x06000 Vertical filter coefficients address for Output 2 R/W Bit[31] to Bit[0]=Programmable
0x06800 Horizontal filter coefficients address for Output 2 R/W Bit[31] to Bit[0]=Programmable
0x08000 Vertical filter coefficients address for Output 3 R/W Bit[31] to Bit[0]=Programmable
0x08800 Horizontal filter coefficients address for Output 3 R/W Bit[31] to Bit[0] =Programmable
0x0A000 Vertical filter coefficients address for Output 4 R/W Bit[31] to Bit[0] =Programmable
0x0A800 Horizontal filter coefficients address for Output 4 R/W Bit[31] to Bit[0]=Programmable
0x0C000 Vertical filter coefficients address for Output 5 R/W Bit[31] to Bit[0]=Programmable
0x0C8000 Horizontal filter coefficients address for Output 5 R/W Bit[31] to Bit[0]=Programmable
0x0E000 Vertical filter coefficients address for Output 6 R/W Bit[31] to Bit[0]=Programmable
0x0E800 Horizontal filter coefficients address for Output 6 R/W Bit[31] to Bit[0]=Programmable
0x10000 Vertical filter coefficients address for Output 7 R/W Bit[31] to Bit[0]=Programmable
0x10800 Horizontal filter coefficients address for Output 7 R/W Bit[31] to Bit[0] =Programmable
  1. COH = Clear on Hard reset
  2. COR = Clear on read
  3. TOW = Toggle on write
  4. Control Register (0x0000), Global Interrupt Enable Register (0x0004), IP Interrupt Enable Register (0x0008), and IP Interrupt Status Register (0x000C) are explained in section S_AXILITE Control Register Map of Vitis High-Level Synthesis User Guide (UG1399). These registers definitions may have some additional bits; however, in the current IP, we are accessing only bits mentioned in Table 20. Therefore, only these bits need to be considered while accessing the Control Register, Global Interrupt Enable Register, IP Interrupt Enable Register, and IP Interrupt Status Register.