The Embedded Memory Generator core provides byte-write support. Byte-writes are available using either 8-bit or 9-bit byte sizes. When using an 8-bit byte size, no parity bits are used and the memory width is restricted to multiples of 8 bits. When using a 9-bit byte size, each byte includes a parity bit, and the memory width is restricted to multiples of 9 bits.
When byte-writes are enabled, the
we[a|b]
(wea or web) bus is N bits wide, where N
is the number of bytes in din[a|b]. The most
significant bit in the Write enable bus corresponds to the most significant byte in the
input word. Bytes are stored in memory only if the corresponding bit in the Write enable
bus is asserted during the write operation.
When 8-bit bytes are selected, the din and dout data buses are constructed from 8-bit bytes, with no
parity. When 9-bit bytes are selected, the din and
dout data buses are constructed from 9-bit bytes, with the 9th bit
of each byte in the data word serving as a parity bit for that byte.
The byte-write feature might be used in conjunction with the data width aspect ratios, which can limit the choice of data widths as described in Data Width Aspect Ratios. However, it might not be used with the no change operating mode. This is because if a memory configuration uses multiple primitives in width, and only one primitive is being written to (using partial byte writes), then the no change mode only applies to that single primitive. The no change mode does not apply to the other primitives that are not being written to, so these primitives can still be read. The byte-Write feature also affects the operation of the write first mode, as described in Write First Mode Considerations .
Byte-Write Example
Consider a single-port RAM with a data width of 24 bits, or 3 bytes with byte size of 8 bits. The write enable bus, wea, consists of 3 bits. The following figure illustrates the use of byte-writes, and shows the contents of the RAM at address 0. Assume all memory locations are initialized to 0.
