Core Specifics |
Supported Device Family
1
|
AMD Versal™
Adaptive
SoCs |
Supported User Interfaces |
Memory Interface |
Resources |
Performance and Resource Use web
page
|
Provided
with Core
|
Design Files |
System Verilog |
Example Design |
N/A |
Test Bench |
N/A |
Constraints File |
N/A |
Simulation Model |
N/A
2
|
Supported S/W Driver |
N/A |
Tested Design Flows
2
|
Design Entry |
IP integrator
|
Simulation |
For supported simulators, see the
Vivado Design Suite User Guide: Release
Notes, Installation, and Licensing (UG973). |
Synthesis |
Vivado Synthesis |
Support |
All Vivado IP Change
Logs |
Master Vivado IP Change Logs: 72775
|
Support web page
|
- For a complete list of
supported devices, see the AMD Vivado™
IP catalog.
- For the supported versions of
the tools, see the
Vivado Design Suite User Guide: Release
Notes, Installation, and Licensing (UG973).
|