The Embedded Memory Generator core and the associated XPM libraries are rigorously verified using advanced verification techniques, including a constrained random configuration generator and a cycle-accurate bus functional model.
Simulation
The Embedded Memory Generator core has been tested with the Xilinx® Vivado® Design Suite, Xilinx XSIM, Cadence Incisive Enterprise Simulator (IES), Synopsys VCS and VCS MX, and Mentor Graphics Questa SIM.