AXI4-Stream FIFOs
AXI4-Stream FIFOs are best for non-address-based, point-to-point applications. Use them to interface to other IP cores using this interface (for example, AXI4 versions of DSP functions such as FFT, DDS, and FIR Compiler).
The AXI4-Stream Application diagram illustrates the use of AXI4-Stream FIFOs to create a Data Mover block. In this application, the Data Mover is used to interface PCI Express, Ethernet MAC and USB modules which have a LocalLink to an AXI System Bus. The AXI Interconnect and Data Mover blocks shown in the AXI4-Stream Application diagram are which are available in the Vivado IP catalog.
AXI4-Stream support most of the features that the Native interface FIFOs support in first word fall through mode. Use AXI4-Stream FIFOs to replace Native interface FIFOs to make interfacing to the latest versions of other AXI LogiCORE IP functions easier.
AXI4 Memory Mapped FIFOs
The full version of the AXI4 interface is referred to as AXI4. It can also be referred to as AXI Memory Mapped. Use AXI4 FIFOs in memory mapped system bus designs such as bridging applications requiring a memory mapped interface to connect to other AXI4 blocks.
The AXI4 Application diagram shows an example application for AXI4 FIFOs where they are used in AXI4 to AXI4 bridging applications enabling different AXI4 clock domains running at 200, 100, 66, and 156 MHz to communicate with each other. The AXI4 to AXI4-Lite bridging is another pertinent application for AXI4 FIFO (for example, for performing protocol conversion). The AXI4 FIFOs can also be used inside an IP core to buffer data or transactions (for example, a DRAM Controller). The AXI Interconnect block shown in the AXI4 Application diagram is an IP core available in the Vivado IP catalog.
AXI4-Lite FIFOs
The AXI4-Lite interface is a simpler AXI interface that supports applications that only need to perform simple Control/Status Register accesses, or peripherals access.
The following figure shows an AXI4-Lite FIFO being used in an AXI4 to AXI4-Lite bridging application to perform protocol conversion. The AXI4-Lite Interconnect shown in the following figure is also available as an IP core in the Vivado IP catalog.
