Designing with the Core - 1.0 English

Embedded FIFO Generator LogiCORE IP Product Guide (PG327)

Document ID
PG327
Release Date
2023-05-10
Version
1.0 English

This chapter describes the steps required to turn an Embedded FIFO Generator core into a fully functioning design integrated with the user application logic.

Tip: Depending on the configuration of the FIFO core, only a subset of the implementation details provided are applicable. For successful use of a FIFO core, the design guidelines discussed in this chapter must be observed.