Native Interface FIFOs - 1.0 English

Embedded FIFO Generator LogiCORE IP Product Guide (PG327)

Document ID
PG327
Release Date
2023-05-16
Version
1.0 English

The Native interface FIFO can be customized to utilize block RAM, UltraRAM, and Distributed RAM resources available in some FPGA families to create high-performance, area-optimized FPGA designs. Standard mode and First Word Fall Through are the two operating modes available for Native interface FIFOs.

Figure 1. Native Interface FIFO Signals