The following table summarizes the supported Embedded FIFO Generator core features for each clock configuration and memory
type.
| FIFO Feature | Independent Clocks | Common Clock | |||
|---|---|---|---|---|---|
| Block RAM | Distributed RAM | Block RAM | Distributed RAM | UltraRAM | |
| Non-symmetric Aspect Ratios | ✓ | ✓ | ✓ | ||
| Symmetric Aspect Ratios | ✓ | ✓ | ✓ | ✓ | ✓ |
| Almost Full | ✓ | ✓ | ✓ | ✓ | ✓ |
| Almost Empty | ✓ | ✓ | ✓ | ✓ | ✓ |
| Handshaking | ✓ | ✓ | ✓ | ✓ | ✓ |
| Data Count | ✓ | ✓ | ✓ | ✓ | |
| Programmable Empty/Full Thresholds | ✓ | ✓ | ✓ | ✓ | ✓ |
| First-Word Fall-Through | ✓ | ✓ | ✓ | ✓ | ✓ |
| Synchronous Reset | ✓ | ✓ | ✓ | ✓ | ✓ |
| dout Reset Value | ✓ | ✓ | ✓ | ✓ | ✓ |
| ECC | ✓ | ✓ | ✓ | ||
| Configurable Read Latency | ✓ | ✓ | ✓ | ✓ | ✓ |
| Dynamic Power Saving | ✓ | ||||