AXI4-Lite Slave (sw_s_axi_lite) Memory Map - 3.0 English

NVMe Target Controller LogiCORE IP Product Guide (PG329)

Document ID
PG329
Release Date
2021-10-27
Version
3.0 English

The table below shows the memory map of the AXI4-Lite slave interface based on number of PCIe® functions supported.

Table 1. AXI4-Lite slave (sw_s_axi_lite) memory map
Start Address Offset Size (KB) Description Comments
Function 0 Registers Space
18’h0_0000 8 NVMe TC IP Control and Status Registers Internal to TC IP
18’h0_2000 8 Function 0 NVMe Registers (excluding doorbells) Exposed to the host using Function0.BAR0 (excluding doorbells)
18’h0_4000 8 Function 0 Bridge Registers QDMA Bridge Registers. For more information, see QDMA Register Access (C_CPM_QDMA = 0).
18’h0_6000 40 Reserved Reserved if C_CPM_QDMA = 0
18'h0_6000 - 0_6010   Completion Context Data and Command (Refer to Completion Context Structure) Applicable when C_CPM_QDMA = 1
18’h1_0000 32 Function0 HSQ attributes Internal to TC IP
18’h1_8000 32 Function0 HCQ attributes Internal to TC IP
18’h2_0000 128 Function0 QDMA Registers QDMA Specific Registers
Function 1 Registers Space
18’h0_0000 + 256KB 8 Reserved Reserved
18’h0_2000 + 256KB 8 Function 1 NVMe Registers (excluding doorbells) Exposed to the host using Function1.BAR0 (excluding doorbells)
18’h0_4000 + 256KB 8 Function 1 Bridge Registers QDMA Bridge Registers. For more information, see QDMA Register Access (C_CPM_QDMA = 0).
18’h0_6000 + 256KB 40 Reserved Reserved if C_CPM_QDMA = 0
18'h0_6000 + 256KB to 18'h0_6010 + 256KB   Completion Context Data and Command (Refer to Completion Context Structure) Applicable when C_CPM_QDMA = 1
18’h1_0000 + 256KB 32 Function1 HSQ attributes Internal to TC IP
18’h1_8000 + 256KB 32 Function1 HCQ attributes Internal to TC IP
18’h2_0000 + 258KB 128 Function1 QDMA Registers QDMA Specific Registers
Function N Registers Space
18’h0_0000 + (256KB * N) 8 Reserved Reserved
18’h0_2000 + (256KB * N) 8 Function N NVMe Registers (excluding doorbells) Exposed to the host using FunctionN.BAR0 (excluding doorbells)
18’h0_4000 + (256KB * N) 8 Function N Bridge Registers QDMA Bridge Registers. For more information, see QDMA Register Access (C_CPM_QDMA = 0).
18’h0_6000 + (256KB * N) 40 Reserved Reserved if C_CPM_QDMA = 0
18'h0_6000 + (256KB * N )to 18'h0_6010 + (256KB * N)   Completion Context Data and Command (Refer to Completion Context Structure) Applicable when C_CPM_QDMA = 1
18’h1_0000 + (256KB * N) 32 Function N HSQ attributes Internal to TC IP
18’h1_8000 + (256KB * N) 32 Function N HCQ attributes Internal to TC IP
18’h2_0000 + (256KB * N) 128 Function N QDMA Registers QDMA Specific Registers
  1. N = 0. Only one function is supported in this release.