AXI4-Stream C2H Completion Port - 3.0 English

NVMe Target Controller LogiCORE IP Product Guide (PG329)

Document ID
PG329
Release Date
2021-10-27
Version
3.0 English
Table 1. AXI4-Stream C2H Completion Port Descriptions - m_axis_c2h_cmpt (C_CPM_QDMA = 0)
Port Name I/O Description
m_axis_c2h_cmpt_tdata[511:0] O Completion data from the user application. This contains information that is written to the completion ring in the host
m_axis_c2h_cmpt_dpar [C_M_AXI_DATA_WIDTH/8-1:0 ] O Odd parity computed as bit per 32b. m_axis_c2h_cmpt_dpar[0] is parity over m_axis_c2h_cmpt_tdata[31:0]. m_axis_c2h_cmpt_dpar[1] is parity over m_axis_c2h_cmpt_tdata[63:31] and so on.
m_axis_c2h_cmpt_tvalid O Valid
m_axis_c2h_cmpt_tready I Ready
m_axis_c2h_cmpt_ctrl_qid[10:0] O Queue ID
m_axis_c2h_cmpt_size[1:0] O
  • 00: 8B completion
  • 01: 16B completion
  • 10: 32B completion
  • 11: 64B completion
m_axis_c2h_cmpt_ctrl_cmpt_type[1:0] O
  • 2’b00: NO_PLD_NO_WAIT. The CMPT packet does not have a corresponding payload packet, and it does not need to wait.
  • 2’b01: NO_PLD_BUT_WAIT. The CMPT packet does not have a corresponding payload packet; however, it still needs to wait for the payload packet to be sent before sending the CMPT packet.
  • 2’b10: RSVD
  • 2’b11: HAS_PLD. The CMPT packet has a corresponding payload packet, and it needs to wait for the payload packet to be sent before sending the CMPT packet.
m_axis_c2h_cmpt_ctrl_marker O Marker message to ensure that the pipeline is completely flushed.
m_axis_c2h_cmpt_ctrl_user_trig O You can trigger the interrupt and the status descriptor write, if they are enabled.
m_axis_c2h_cmpt_ctrl_wait_pld_pkt_id[15:0] O The data payload packet ID that the CMPT packet needs to wait for before it can be sent.
m_axis_c2h_cmpt_ctrl_col_idx[2:0] O Color index that defines whether or not you want the color bit in the CMPT packet and the bit location of the color bit, if present.
m_axis_c2h_cmpt_ctrl_err_idx[2:0] O Error index that defines whether or not you want the error bit in the CMPT packet and the bit location of the error bit, if present.
m_axis_c2h_ctrl_port_id O Port ID
Table 2. AXI4-Stream C2H Completion Port Descriptions - dma_m_axis_c2h_cmpt (C_CPM_QDMA = 1)
Port Name I/O Description
dma_m_axis_c2h_cmpt_tdata[127:0] O Completion data from the user application. This contains information that is written to the completion ring in the host
dma_m_axis_c2h_cmpt_dpar [3:0] O Odd parity computed as bit per 32b. dma_m_axis_c2h_cmpt_dpar[0] is parity over dma_m_axis_c2h_cmpt_tdata[31:0]. dma_m_axis_c2h_cmpt_dpar[1] is parity over dma_m_axis_c2h_cmpt_tdata[63:31] and so on.
dma_m_axis_c2h_cmpt_tvalid O Valid
dma_m_axis_c2h_cmpt_tready I Ready
dma_m_axis_c2h_cmpt_tlast O Last
m_axis_c2h_cmpt_size[1:0] O
  • 00: 8B completion
  • 01: 16B completion
  • 10: 32B completion
  • 11: Unknown