Example Design - 1.0 English

Audio Formatter LogiCORE IP Product Guide (PG330)

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1.0 English

This chapter contains information about the example design provided in Vivado® Design Suite.

Figure 1. Core Example Design

The example design demonstrates the functioning of Audio Formatter IP core for 2 channels. An Audio stream generator module is used to generate either PCM or AES audio input to the IP based on the configuration. Audio stream checker is also implemented to verify the functioning of core by reading the known data from memory and checking the incremental pattern.

Based on the configuration of DUT (Device under Test), the data is written and read back from the memory. After verification of the status of the commands from the core and the data check at the checker module, the test evaluates to PASS or FAIL.

The example design consists of following blocks:

  1. Clocking wizard: To generate necessary clocks AXI4-Lite clock and other audio clock
  2. Reset Generator: To generate corresponding synchronous resets to the system
  3. Audio Formatter IP DUT
  4. A generated Audio Formatter S2MM core based on the configuration of DUT MM2S core
  5. 2 AXI Traffic Generator IPs to program all the IPs
  6. 2 instances of AXI4 Block RAM Controller as a AXI4 Memory Map slave to the DUT and S2MM generated core to interface with Memory
  7. 2 instances of XPM Memory Single port RAM
  8. Audio Stream generator module
  9. Audio stream checker

The Audio stream generator, checker, and the example design are not generic configurations. The modules and example design are generated based on IP configuration of DUT. Any changes in the models are not recommended.

Irrespective of the number of Channels configuration of DUT, no_of_valid_channels is programmed as 2 for the core through registers. So, the Example design always designed to work with 2 channels configuration only.