AMD IP - GT Quad Integration - 1.1 English

Versal Adaptive SoC Transceivers Wizard LogiCORE IP Product Guide (PG331)

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1.1 English

AMD GT-based IPs such as Aurora, PCIe, and MRMAC provide Block Automation in the IP integrator to enable you to connect multiple AMD parent IPs to GT Quad seamlessly. IP block automation instantiates GT Quads and creates essential datapath, USRCLK, and GT REFCLK connections.

Perform the following steps to connect multiple Aurora IPs using block automation:

  1. Add Aurora64B66B IP using Add IP option in the IP integrator canvas.
  2. Configure Aurora64B66B IP for the number of lanes, line rates, and so on.
  3. Click Run_Block_Automation. In the Block Automation GUI, select one of the options: Auto, Start_with_New_Quad, or Customized_Connections. For details on block automation options, see Block Automation Flow.
  4. Repeat steps 2 and 3 to add more Aurora64B66B IP instances based on your system need.

GT Quad parameters are propagated from its connected IPs when the design is validated. Hence, all GT Quad parameters are marked Auto in the Transceiver Wizard GUI. However, you can change the Auto option to Manual for Transceiver Configs, as shown in the following figure to fine-tune parameters like insertion loss, drive strength, equalization, and other advanced settings. After toggling to manual mode, any changes to the parent IP configurations followed by validate design step no longer propagates GT Quad parameters from the parent IP to GT Quad. Perform manual changes only if essential and after all the parent IP parameters are propagated to GT Quad.

Figure 1. Auto to Manual Options Switch in Transceiver Wizard