- Protocol Support for HDMI 2.1
- Protocol-specific functions for HDMI
-
HDMI clock detector
- Use of fourth GT channel as TX transition minimized differential
signaling (TMDS) clock source
- Non-integer data recovery unit (NI-DRU) support for lower line rates
- Independent TX and RX path line rates (device-specific)
- Single quad support
- Phase-locked loop (PLL) switching support from software
- Transmit and receiver user clocking
- Full transceiver dynamic reconfiguration port (DRP) accesses and
transceiver functions
- Advanced clocking support
-
AXI4-Lite support for register accesses