The HDMI core clocking diagrams per transceiver type are shown below. Follow the guidelines below when connecting the HDMI PHY Controller clock ports or refer to the HDMI example design.
- Connect the external clock generator output clock to the TX reference
clock input that was selected in the HDMI PHY Controller
AMD Vivado™
IDE. The TX reference clock lock
indicator should be connected to the
tx_refclk_rdy
port. See HDMI Reference Clock Requirements for its implementation. - Connect the RX TMDS clock from the external HDMI retimer component clock output to the corresponding RX reference clock input that was selected in the HDMI PHY Controller IDE.
- Connect the DRU and FRL mode reference clock to the reference clock input that was selected in the HDMI PHY Controller IDE. See HDMI Reference Clock Requirement for the NI-DRU and FRL mode frequency requirements.
- The
txoutclk_out/rxoutclk_out
signal is connected to thelink_clk
of the HDMI MAC controller. - The
tx_video_clk/rx_video_clk
signals are connected to thevideo_clk
of HDMI MAC controller. - For TMDS mode, the
tx_tmds_clk
signal can be connected to any logic, for example, an audio generator module. For FRL mode, thetx_tmds_clk
is the same astx_video_clk
. - The
rx_tmds_clk_p/n
signal should be connected to the input of the external clock generator if the HDMI PHY Controller is used in pass through mode. This is to have a phase-aligned and jitter-attenuated reference clock for the HDMI TX Subsystem. - The
rx_tmds_clk
signal can be connected to any logic.Tip: Thetx_tmds_clk
andrx_tmds_clk
clock is the same as TMDS Clock in HDMI 2.0b Specification. For more information, see Section 6 in the HDMI 2.0b Specification. - For FRL mode, the user needs to pass
video_cke
from RX to TX Subsystem.
This connection is not needed if the HDMI PHY Controller is used in a TX-only application because the external clock generator should run in standalone mode, using its local oscillator as its reference.
The following clocking diagrams show the default clock buffers used per device
type. You can change these buffers as per your application's requirements using the
user-configurable parameters. These parameters are in white dash-lined boxes with the
prefix CONFIG.<user_param_name>
.
The user parameters can be configured using Tcl commands or through the Block Properties window in IP integrator. For example:
set_property -dict [list CONFIG.C_Use_Oddr_for_Tmds_Clkout {false}] [get_ips <ip name>]
set_property -dict [list CONFIG.C_Tx_Outclk_Buffer {none}] [get_ips <ip name>]
set_property -dict [list CONFIG.C_Rx_Video_Clk_Buffer {bufg}] [get_ips <ip name>]