Interrupt Enable Register (IER) (0x0110) - 1.0 English

HDMI PHY Controller LogiCORE IP Product Guide (PG333)
Document ID
PG333
Release Date
2023-12-01
Version
1.0 English
Table 1. Interrupt Enable Register (IER)
Bit Default Value Access Type Description
0 0 WO TX Reset Done Change Event
1 0 WO RX Reset Done Change Event
2 0 WO CPLL Lock Change Event
3 0 WO QPLL Lock Change Event
4 0 WO TX Alignment Done Event
5 0 WO QPLL1 Lock Change Event
6 0 WO Clock Detector TX Frequency Change
7 0 WO Clock Detector RX Frequency Change
9 0 WO TX MMCM Lock Change Event
10 0 WO RX MMCM Lock Change Event
30 0 WO Clock Detector TX Debounce Timeout
31 0 WO Clock Detector RX Debounce Timeout