The following table shows the relationship between the fields in the AMD Vivado™ IDE and the user parameters (which can be viewed in the Tcl Console).
Vivado IDE Parameter/Value | User Parameter/Value | Default Value | Register Encoding |
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TX/RX Protocol Selection | C_Tx/Rx_Protocol | HDMI 2.1 | |
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TX/RX Clock Primitive | C_Tx/Rx_Clk_Primitive | MMCM | |
TX/RX Max GT Line Rate | Tx/Rx_Max_GT_Line_Rate |
6.0 Gb/s, 12.0 Gb/s |
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TX/RX Clock Primitive | C_Tx/Rx_Clk_Primitive | MMCM | |
TX/RX Channels | C_Tx/Rx_No_Of_Channels |
3, 4 |
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Tx PLL Type 1 | C_TX_PLL_SELECTION |
6 |
TX/RXSYSCLKSEL TX/RXPLLCLKSEL |
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00 | ||
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Follow QPLL0 or QPLL1 encoding | ||
Rx PLL Type 1 | C_RX_PLL_SELECTION | 0 | Similar to TX PLL Type |
Tx Ref Clock Selection 1 | C_TX_REFCLK_SEL | 1 | |
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Tx FRL Ref Clock Selection | C_TX_FRL_REFCLK_SEL | 2 | |
Rx Ref Clock Selection 1 | C_RX_REFCLK_SEL | 0 | Similar to Tx Ref Clock Selection |
Rx FRL Ref Clock Selection | C_RX_FRL_REFCLK_SEL | 2 | |
Tx Buffer Bypass | Tx_Buffer_Bypass |
True |
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TX REFCLK Ready Active | C_Txrefclk_Rdy_Invert | High | |
NI-DRU | C_NIDRU | TRUE | |
NI-DRU Ref Clock Selection | C_NIDRU_REFCLK_SEL | 2 | Similar to Tx Ref Clock Selection |
Advanced Clock Mode | Adv_Clk_Mode | false | |
Number of pixels per clock Value Selection
|
C_INPUT_PIXELS_PER_CLOCK | 4 | |
DRP Clock Frequency (MHz) | DRPCLK_FREQ |
100 |
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Insertion Loss at Nyquist (dB) | C_user_loss | 20 | |
Transceiver Width Value Selection
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Transceiver_Width | 4 | |
GT: Starting channel Location | CHANNEL_SITE | the lowest number from available X<num>Y<num> in GT | |
Use ODDR/ODDRE1 for TX and RX differential TMDS clock out | C_Use_Oddr_for_Tmds_Clkout 3 | TRUE | |
TX TMDS Clock output buffer
none, bufg 4 |
C_Tx_Tmds_Clk_Buffer 3 |
bufg |
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TX Video Clock output buffer
none, bufg 4 |
C_Tx_Video_Clk_Buffer 3 | bufg | |
RX TMDS Clock output buffer
none, bufg 4 |
C_Rx_Tmds_Clk_Buffer 3 | bufg | |
RX Video Clock output buffer
none, bufg 4 |
C_Rx_Video_Clk_Buffer 3 | bufg | |
TX Phase Interpolator port enable |
C_TXPI_Port_EN 1 | none | |
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