Clock Detector Control Register (0x0200) - 1.0 English

HDMI GT Controller LogiCORE IP Product Guide (PG334)

Document ID: PG334
Release Date: 2022-04-21
Version: 1.0 English

Table 1. Clock Detector Control Register
Bit	Default Value	Access Type	Description
0	0	RW	Run: Set this bit to enable clock detector.
1	0	RW	TX Timer Clear – Self Clearing
2	0	RW	RX Timer Clear – Self Clearing
3	0	RW	TX Frequency Reset – Self Clearing when TX Frequency Zero bit asserts
4	0	RW	RX Frequency Reset – Self Clearing when RX Frequency Zero bit asserts
12:5	0	RW	Frequency Lock Counter Threshold