HDMI TX Clock Requirement Example - 1.0 English

HDMI GT Controller LogiCORE IP Product Guide (PG334)

Document ID
PG334
Release Date
2022-04-21
Version
1.0 English

The frequency range of the external programmable clock generator must be selected based on the transceiver type and the PLL type for TX. The following table shows the frequency range needed from the clock generator if the HDMI GT Controller is used to support all the video formats in the tables in the HDMI GT Controller HDMI Implementation section.

Table 1. External Clock Generator Typical Frequency Range
Configuration TX PLL Reference Clock Range (MHz)
GTYE5 LCPLL
  • 125 to 297 (for HDMI)
  • 125 to 400 (for HDMI 2.1 FRL)
RPLL
  • 125 to 297 (for HDMI)
  • 125 to 400 (for HDMI 2.1 FRL)

The following table shows the external clock generator frequency range if the HDMI GT Controller TX is used to support video formats of SMPTE-SDI: SD-SDI, HD-SDI, and 3G-SDI which in HDMI have equivalent TMDS clocks 27, 74.25, or 74.25/1.001 MHz and 148.5 or 148.5/1.001 MHz, respectively. SD-SDI and HD-SDI reference clock are below the minimum threshold of all PLL types thus oversampling mode must be used to support it. HD-SDI reference clock is below the minimum threshold of GTYE5 LCPLL and RPLL thus oversampling mode must be used to support it for corresponding transceiver and PLL types.

Table 2. External Clock Generator Frequency Range for SMPTE-SDI
Transceiver Type TX PLL Reference Clock Range (MHz) Remarks
GTYE5 LCPLL 125 to 148.5

SD-SDI uses x5 oversampling

HD-SDI uses x2 oversampling

RPLL 125 to 148.5

SD-SDI uses x5 oversampling

HD-SDI uses x2 oversampling