High-Speed I/O - 1.0 English

HDMI GT Controller LogiCORE IP Product Guide (PG334)

Document ID
PG334
Release Date
2022-04-21
Version
1.0 English

The three or four differential pairs of TX and RX high-speed lanes are implemented as GT TX and RX channels respectively thus IO standard constraints are not required. Board design and connectivity should follow HDMI standard recommendations. Only the package pin assignments are needed for the GT channels.

Sample Pin Assignments:

set_property PACKAGE_PIN AB7 [get_ports TX_DATA_OUT_txp[0]]
set_property PACKAGE_PIN AA9 [get_ports TX_DATA_OUT_txp[1]]
set_property PACKAGE_PIN Y7  [get_ports TX_DATA_OUT_txp[2]]
set_property PACKAGE_PIN W9  [get_ports TX_DATA_OUT_txp[3]]

set_property PACKAGE_PIN AB2 [get_ports RX_DATA_IN_rxp[0]]
set_property PACKAGE_PIN AA4 [get_ports RX_DATA_IN_rxp[1]]
set_property PACKAGE_PIN Y2  [get_ports RX_DATA_IN_rxp[2]]
set_property PACKAGE_PIN W4  [get_ports RX_DATA_IN_rxp[3]]