The GTYE5 and GTYP transceivers in the AMD Versal™ ACAPs have two main types of PLLs, the LCPLL and the RPLL. One Quad has four channels that are clustered into two Duals, HSCLK0 and HSCLK1. Channels 0 and 1 are clustered in HSCLK0, while Channels 3 and 4 are clustered in HSCLK1. Each HSCLK dual has one LCPLL and RPLL, which can only provide a clock to the channels they are clustered with. The HDMI GT Controller core uses all of the PLL types to support transmitter and receiver operations simultaneously. The HDMI GT Controller core allows you to choose whether to use the HSCLK0/1_LCPLL or the HSCLK0/1_RPLL on the transmitter. The receiver should use the other PLL type that was not chosen for TX and vice versa. The GTYE5 and GTYP transceivers have a minimum line rate support of 1.25 Gbps per channel.
Block automation must be run on the HDMI GT Controller core after its graphical user interface (GUI) configuration to instantiate and connect to the GT Wizard automatically. This process also ensures that the GT Wizard is preloaded with the necessary configurations such as the line rate configuration table (see the following table). These configurations are needed for the HDMI™ operation.