This register lets you specify the number of clock cycles to be used for averaging the FIFO count. At the end of this, if the average is more than the FIFO setpoint, then ACR would vary the N or Maud to increase the output. If the average is less than the FIFO setpoint, then ACR would vary the N or Maud to decrease the output frequency.
| Bit | Default Value | Access Type | Description |
|---|---|---|---|
| 31:4 | 0 | RO | Reserved |
| 3:0 | 0 | R/W | Specify the number of clock cycles to be used for averaging. Num of clock cycles of equal of to power of 2 of this value. |