The Soft ECC Proxy IP provides registers to control its behavior and also provides its status information. The register space in this IP can be accessed through the AXI4-Lite interface. The following table lists the existing registers in this IP.
| Offset (hex) | Register Name | Access Type | Reset Value | Description |
|---|---|---|---|---|
| 0x00 | Soft Reset register | WO | 0x0 | Soft Reset register |
| 0x04 | Interrupt type register | RO | 0x0 | Gives information on the type of error that has occurred (single bit/double bit). |
| 0x10 | Interrupt Status register 0 | RO | 0x0 | Gives the status of single bit errors that occur on data bytes 0 to 31. |
| 0x14 | Interrupt Status register 1 | RO | 0x0 | Gives the status of single bit errors that occur on data bytes 32 to 63. |
| 0x20 | Interrupt Status register 2 | RO | 0x0 | Gives the status of double bit errors that occur on data bytes 0 to 31. |
| 0x24 | Interrupt Status register 3 | RO | 0x0 | Gives the status of double bit errors that occur on data bytes 32 to 63. |
| 0x28 | Error Start Address register | RO | 0x0 | Gives the lower 32 bits of the burst address when the first error occurs |
| 0x2C | Error Start Address register 1 | RO | 0x0 | Gives the higher 32 bits of the burst address when the first error occurs. |
| 0x30 | Single-Bit Error Count register | RO | 0x0 | Gives the number of the single bit errors that have occurred. |
| 0x34 | Double-Bit Error Count register | RO | 0x0 | Gives the number of double bit errors that have occurred. |