Configuration Management Interface Ports - 2.0 English

Versal Adaptive SoC DMA and Bridge Subsystem for PCI Express Product Guide (PG344)

Document ID
PG344
Release Date
2023-11-10
Version
2.0 English

The Configuration Management interface is used to read and write to the Configuration Space Registers. The following table defines the ports in the Configuration Management interface of the core.

Table 1. Configuration Management Interface Ports
Port Direction Width Description
cfg_mgmt_addr I 19 Read/Write Address.

Configuration Space Dword-aligned address

cfg_mgmt_byte_enable I 4 Byte Enable

Byte Enable for write data, where cfg_mgmt_byte_enable[0] corresponds to cfg_mgmt_write_data[7:0] and so on

cfg_mgmt_read_data O 32 Read Data Out

Read data provides the configuration of the Configuration and Management registers

cfg_mgmt_read I 1 Read Enable

Asserted for a read operation. Active-High

cfg_mgmt_read_write_done O 1 Read/Write Operation Complete

Asserted for 1 cycle when operation is complete. Active-High

cfg_mgmt_write_data I 32 Write data

Write data is used to configure the Configuration and Management registers

cfg_mgmt_write I 1 Write Enable

Asserted for a write operation. Active-High