Host Profile - 2.0 English

Versal Adaptive SoC DMA and Bridge Subsystem for PCI Express Product Guide (PG344)

Document ID
PG344
Release Date
2023-11-10
Version
2.0 English

Host profile must be programmed to represent root port host. Host profile can be programmed through context programming. Select QDMA_CTXT_SELC_HOST_PROFILE (4'hA) in QDMA_IND_CTXT_CMD. Host profile context structure is given in the following table:

Table 1. Host Profile Context Structure
Bit Bit Width Field Name Description
[255:188] 68 Reserved Reserved
[187:186] 2   H2C AXI4-MM write awprot
[185:182] 4   H2C AXI4-MM write awcache
[181:178] 4   H2C AXIMM steering
[177:104] 74 Reserved Reserved
[103:102] 2   C2H AXI4-MM read arprot
[101:98] 4   C2H AXI4-MM read awcache
[97:94] 4   C2H AXIMM steering
[0:93] 94 Reserved Reserved
Note: H2C AXI4-MM steering bit and C2H AXI4-MM steering bit should set to 0s. If not, DMA AXI4-MM transfers do not work. For most cases, host profile context structure is all 0s, and host profile must still be programmed to represent a host.