Minimum Device Requirements - 2.0 English

Versal Adaptive SoC DMA and Bridge Subsystem for PCI Express Product Guide (PG344)

Document ID
PG344
Release Date
2023-11-10
Version
2.0 English
Table 1. PL PCIE4 with QDMA, Bridge, or XDMA Soft IP Subsystem Maximum Configurations (Versal Prime, Versal AI Core, Versal AI Edge)
Speed Grade -1 -1 -2 -2 -2 -3
Voltage Grade L (0.70V) M (0.80V) L (0.70V) M (0.80V) H (0.88V) H (0.88V)
Gen1 (2.5 GT/s per lane) x16 x16 x16 x16 x16 x16
Gen2 (5 GT/s per lane) x16 x16 x16 x16 x16 x16
Gen3 (8 GT/s per lane) x16 1 x16 1 x16 1 x16 x16 x16
Gen4 (16 GT/s per lane) x8 1 x8 1 x8 1 x8 x8 x8
  1. The IP customization GUI selection might not have an option to select Gen3 and above speeds. For more information, see AR 000035682.
Table 2. PL PCIE5 with QDMA or Bridge Soft IP Subsystem Maximum Configurations (Versal Premium, Versal Prime, Versal HBM, Versal AI Core)
Speed Grade -1 -1 -2 -2 -2 -3
Voltage Grade L (0.70V) M (0.80V) L (0.70V) M (0.80V) H (0.88V) H (0.88V)
Gen1 (2.5 GT/s per lane) x16 x16 x16 x16 x16 x16
Gen2 (5 GT/s per lane) x16 x16 x16 x16 x16 x16
Gen3 (8 GT/s per lane) x16 2 x16 2 x16 2 x16 x16 x16
Gen4 (16 GT/s per lane) x8 2 x8 2 x8 2 x8 x8 x8
Gen5 (32 GT/s per lane) 1 N/A N/A x4 2 x4 x4 x4
  1. PL PCIe5 PCIe Gen5 support is available only in Versal Premium, Versal Prime, Versal HBM, and Versal AI Core series.
  2. The IP customization GUI selection might not have an option to select Gen3 and above speeds. For more information, see AR 000035682.