Queue Setup - 2.0 English

Versal Adaptive SoC DMA and Bridge Subsystem for PCI Express Product Guide (PG344)

Document ID
PG344
Release Date
2023-11-10
Version
2.0 English
  • Clear Descriptor Software Context.
  • Clear Descriptor Hardware Context.
  • Clear Descriptor Credit Context.
  • Set-up Descriptor Software Context.
  • Clear Prefetch Context.
  • Clear Completion Context.
  • Set-up Completion Context.
    • If interrupts/status writes are desired (enabled in the Completion Context), an initial Completion CIDX update is required to send the hardware into a state where it is sensitive to trigger conditions. This initial CIDX update is required, because when out of reset, the hardware initializes into an unarmed state.
  • Set-up Prefetch Context.