Target Function Register (0x500C) - 2.0 English

Versal Adaptive SoC DMA and Bridge Subsystem for PCI Express Product Guide (PG344)
Document ID
PG344
Release Date
2023-11-10
Version
2.0 English
Table 1. Target Function Register (0x500C)
Bit Index Default Access Type Field Description
[31:8] 0 NA Reserved Reserved
[7:0] 0 RW target_fn_id This field is for PF use only.

The FN number that the current operation is targeting.