Test Description - 2.0 English

Versal Adaptive SoC DMA and Bridge Subsystem for PCI Express Product Guide (PG344)

Document ID
PG344
Release Date
2023-11-10
Version
2.0 English

The model provides a Test Program Interface (TPI). The TPI provides the means to create tests by invoking a series of Verilog tasks. All tests should follow these steps:

  1. Perform conditional comparison of a unique test name.
  2. Wait for reset and link-up.
  3. Initialize the queue context for that queue.
  4. Transmit packet for the queue.
  5. Verify that the test succeeded.