A set of example designs are hosted on GitHub in the XilinxCEDStore repository. These repositories can be accessed through
Vivado, which can be refreshed with a valid
internet connection including the Versal adaptive
SoC CPM Tandem PCIe example design. You can also
download or clone the GitHub repository to your local machine and point to that location
on your PC. Example designs are available for CPM4 (VCK190) and CPM5 (VPK120) targets.
Following is a tandem CED block design example diagram:
Note: The
provided example designs are for reference only; they might or might not comply with
the requirements for a production design. You are advised to perform extensive
testing and verification before attempting to use it in a production.
Figure 1. Tandem CED Block
To open an example design, perform the following steps:
- Launch Vivado.
- Navigate to the set of example designs for selection.
- From the Quick Start menu, select
- From the Select Project Template window, select
Versal CPM Tandem PCIe and navigate through the menu
to select a project location and board part.
- In the Flow Navigator, click Generate Device Image to run synthesis, implementation, and to generate a programmable device image (.pdi) file that can be loaded to the target Versal device.
Instructions on how to download, install, and use the DMA drivers for this design are here.