AXI Bridge functional mode features are supported when AXI4 slave bridge is enabled in the XDMA or QDMA or in standalone Bridge use mode.
- Supports Multiple Vector Messaged Signaled Interrupts (MSI), MSI-X interrupt, and Legacy interrupt.
- AXI4-MM Slave access to PCIe address space.
- PCIe access to AXI4-MM Master.
- Tracks and manages Transaction Layer Packets (TLPs) completion processing.
- Detects and indicates error conditions with interrupts in Root Port mode.
- Supports a single PCIe 32-bit or three 64-bit PCIe Base Address Registers (BARs) as Endpoint.
- Supports up to two PCIe 32-bit or a single PCIe 64-bit BAR as Root Port.