AXI Bridge Features - 3.4 English

Versal Adaptive SoC CPM DMA and Bridge Mode for PCI Express Product Guide (PG347)

Document ID
PG347
Release Date
2023-11-20
Version
3.4 English

AXI Bridge functional mode features are supported when the AXI4 slave bridge is enabled in the XDMA or QDMA or in standalone Bridge use mode.

  • Supports Multiple Vector Messaged Signaled Interrupts (MSI), MSI-X interrupt, and Legacy interrupt.
  • AXI4 Slave access to PCIe address space.
  • PCIe access to AXI4 Master.
  • Tracks and manages Transaction Layer Packets (TLPs) completion processing.
  • Detects and indicates error conditions with interrupts in Root Port mode.
  • Supports six PCIe 32-bit or three 64-bit PCIe Base Address Registers (BARs) as an Endpoint.
  • Supports up to two PCIe 32-bit or a single PCIe 64-bit BAR as Root Port.