AXI Bridge for PCIe Interrupts - 3.3 English

Versal ACAP CPM DMA and Bridge Mode for PCI Express Product Guide (PG347)

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3.3 English
Table 1. AXI Bridge for PCIe Interrupts
Signal Name I/O Description
xdma0_usr_irq_req[NUM_USR_IRQ-1:0] I User interrupt request. Asset to generate an interrupt and maintain assertion until interrupt is serviced.
xdma0_usr_irq_ack[NUM_USR_IRQ-1:0] O User interrupt acknowledge. Indicates that the interrupt has been set on PCIe. Two acks are generated for legacy interrupt. One ack is generated for MSI/MSI-X interrupts.
xdma0_usr_irq_fnc[7:0] I Function

The function of the vector to be sent.

Note: The xdma0_ prefix in the above signal names will be changed to dma0_* in a future release.

NUM_USR_IRQ is selectable and it ranges from 0 to 15. Each bits in xdma0_usr_irq_req bus corresponds to the same bits in xdma0_usr_irq_ack. For example, xdma0_usr_irq_ack[0] represents an ack for xdma0_usr_irq_req[0].