AXI Slave Register Space - 3.3 English

Versal ACAP CPM DMA and Bridge Mode for PCI Express Product Guide (PG347)

Document ID
PG347
Release Date
2022-11-02
Version
3.3 English

DMA register space can be accessed using AXI Slave interface. When AXI Slave Bridge mode is enabled (based on GUI settings) user can also access Bridge registers and can also access Host memory space.

Table 1. AXI4 Slave Register Space
Register Space AXI Slave Interface Address Range Details
Bridge registers 0x6_0000_0000 Described in Bridge register space CSV file. See Bridge Register Space for details.
DMA registers 0x6_1002_0000 Described in XDMA Address Register Space.
Slave Bridge access to Host memory space 0xE001_0000 - 0xEFFF_FFFF

0x6_1100_0000 - 0x7_FFFF_FFFF

0x80_0000_0000 - 0xBF_FFFF_FFFF

Address range for Slave bridge access is set during IP customization in the Address Editor tab of the Vivado IDE.