Bridge Register Space - 3.3 English

Versal ACAP CPM DMA and Bridge Mode for PCI Express Product Guide (PG347)

Document ID
PG347
Release Date
2022-11-02
Version
3.3 English

Bridge register addresses start at 0xE00. Addresses from 0x00 to 0xE00 are directed to the PCIe configuration register space.

All the bridge registers are listed in the cpm4-bridge-v2-1-registers.csv available in the register map files.

To locate the register space information:

  1. Download the register map files from the Xilinx website.
  2. Extract the ZIP file contents into any write-accessible location.
  3. Refer to the cpm4-bridge-v2-1-registers.csv file.