C2H Prefetch Engine - 3.3 English

Versal ACAP CPM DMA and Bridge Mode for PCI Express Product Guide (PG347)

Document ID
PG347
Release Date
2022-11-02
Version
3.3 English

The prefetch engine interacts between the descriptor fetch engine and C2H DMA write engine to pair up the descriptor and its payload.

Table 1. C2H Prefetch Context Structure
Bit Bit Width Field Name Description
[45] 1 valid Context is valid
[44:29] 16 sw_crdt Software credit

This field is written by the hardware for internal use. The software must initialize it to 0 and then treat it as read-only.

[28] 1 pfch Queue is in prefetch

This field is written by the hardware for internal use. The software must initialize it to 0 and then treat it as read-only.

[27] 1 pfch_en Enable prefetch
[26] 1 err Error detected on this queue

During the descriptor per-fetch process, if there are any errors detected it will be logged here. This will be per queue basis.

[25:8] 18 reserved Reserved
[7:5] 3 port_id Port ID
[4:1] 4 buf_size_idx Buffer size index
[0] 1 bypass C2H bypass mode, set this bit for Simple bypass mode