CPM4 Common Features - 3.4 English

Versal Adaptive SoC CPM DMA and Bridge Mode for PCI Express Product Guide (PG347)

Document ID
PG347
Release Date
2023-11-20
Version
3.4 English
  • Supports 64, 128, 256, and 512-bit data path.
  • Supports x1, x2, x4, x8, or x16 link widths.
  • Supports Gen1, Gen2, Gen3, and Gen4 link speeds.
Note: x16 Gen4 configuration is not available in the data path from CPM directly to PL. This is only used with the CPM through AXI4 to NoC to PL datapath.

The IP configuration supports and shows the selectable options in the GUI, which are x16, x8, and x4. The PCIe specification requires devices to negotiate link width with the attached link partner during link training. The IP is capable of training down to narrower link widths than the IP configuration set at design time. For designs intending to use narrower x2 or x1 link widths, configure the IP as x4 and connect only the bottom lane(s).