CPM4 Mailbox Ports - 3.3 English

Versal Adaptive SoC CPM DMA and Bridge Mode for PCI Express Product Guide (PG347)

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3.3 English
Note: Mailbox ports are always connected to Mailbox IP. If Mailbox IP is not used, leave the port unconnected (floating). For connection reference look at the picture below.
Table 1. Mailbox Ports
Port Name I/O Description
dma0_mgmt I

These DMA management ports should be connect to Mailbox IP.

Figure 1. CPM4 Mailbox Connection

To connect the Mailbox IP connection, follow these steps.

  • Add PCIe QDMA Mailbox IP. To do so,
    1. Configure the IP for number of PFs (should be same as number of PF selected in QDMA configuration).
    2. Configure the IP for number of VFs in each PF(should be same as number of VF selected in QDMA configuration).
    Note: It is important to match number PFs and VFs to the numbers configured in the QMDA IP. If not, the design will not work.
  • Re-configure NoC IP to add one extra AXI Master port. To do so,
    1. Assign one more AXI clock.
    2. In Outputs tab, assign M00_AXI to aclk2.
    3. In Connectivity tab, select the MM00_AXI pl option for both S00_AXI and SS01_AXIps_pcie.
  • Add AXI SmartConnect IP.
    1. Configure the IP to have one Master, one Slave, one clock, and one reset.
Follow the diagram to make all necessary connection.
  • Connect dma0_usr_irq from CIPS IP to output of Mailbox IP.
  • Connect dma0_usr_flr from CIPS IP to output of Mailbox IP.
  • Make usr_flr and usr_irq interface in Mailbox IP as external pins.