Design Requirements - 3.4 English

Versal Adaptive SoC CPM DMA and Bridge Mode for PCI Express Product Guide (PG347)

Document ID
PG347
Release Date
2023-11-20
Version
3.4 English

The Tandem PCIe and DFX features inherently operate on the same datapaths for this discussion; they both use the PCIe link to deliver bitstream data to the slave boot interface (SBI) buffer, which is grabbed by a PMC DMA block and delivered to the platform processing unit (PPU) for processing and delivery to be programmed to the configurable device resources. The SBI buffer is an 8 KB FIFO and any write to the aperture will occur in order, regardless of the target address. The mechanism for delivery through CPM varies depending on the chosen methodology, but all require specific hardware design requirements and have accompanying software and driver components. CPM4 Controller 1 does not have a hardened DMA controller connected to it, so QDMA, XDMA, and Master Bridge delivery of a bitstream to the SBI would require the use of soft IP or the Versal MCAP VSEC. CPM5 does not support the use of the XDMA controller.

Table 1. Bitstream Delivery Details from PCIe to SBI
Delivery Method CPM4 HW Capable Ctrlr 0 / Ctrlr 1 CPM5 HW Capable Ctrlr 0 / Ctrlr 1 Software Driver
QDMA Yes / No Yes / Yes Yes
XDMA Yes / No No / No Yes
MCAP VSEC Yes / Yes Yes / Yes Yes
Master Bridge Yes / No Yes / Yes Yes
Note: It is possible to take advantage of CPM in streaming only mode with the RQ/RC/CQ/CC interfaces to the PL and deliver reconfigurable partitions to SBI, but this would require a user-written soft IP DMA or bridge and custom software and drivers. It is recommended to use the MCAP VSEC instead for ease of use unless higher throughput is required. The MCAP VSEC can also be used with a user DMA or bridge to load a Tandem PCIe Stage 2 bitstream since the path to the SBI does not require PL logic to be present.

For details on configuring a design in the Vivado Design Suite to support using MCAP VSEC or DMA transfers for Tandem PCIe, refer to Enable the Tandem Configuration Solution. The requirements to load a reconfigurable partition are the same as what’s described for Tandem PCIe since the datapaths are the same. To configure a design for DFX and generate partial bitstreams for reconfigurable modules, refer to Vivado Design Suite User Guide: Dynamic Function eXchange (UG909).