Function Command Register (0x5004) - 3.3 English

Versal ACAP CPM DMA and Bridge Mode for PCI Express Product Guide (PG347)

Document ID
PG347
Release Date
2022-11-02
Version
3.3 English
Table 1. Function Command Register (0x5004)
Bit Index Default Access Type Field Description
[31:3] 0 NA Reserved Reserved
[2] 0 RO Reserved Reserved
[1] 0 RW msg_rcv For VF: VF marks the message in its Incoming Mailbox Memory as received. The hardware asserts the acknowledgement bit of the associated PF.

For PF: PF marks the message send by target_fn as received. The hardware refreshes the i_msg_status of the PF, and clears the o_msg_status of the target_fn.

[0] 0 RW msg_send For VF: VF marks the current message in its own Outgoing Mailbox as valid.

For PF:

Current target_fn_id belongs to a VF: PF finished writing a message into the Incoming Mailbox memory of the VF with target_fn_id. The hardware sets the i_msg_status field of the target FN's status register.

Current target_fn_id belongs to a PF: PF finished writing a message into its own outgoing Mailbox memory. The hardware pushes the message to the event queue of the PF with target_fn_id.