H2C Stream Descriptor (16B) - 3.4 English

Versal Adaptive SoC CPM DMA and Bridge Mode for PCI Express Product Guide (PG347)

Document ID
PG347
Release Date
2023-11-20
Version
3.4 English
Table 1. H2C Descriptor Structure
Bit Bit Width Field Name Description
[127:96] 32 addr_h Address High. Higher 32 bits of the source address in Host
[95:64] 32 addr_l Address Low. Lower 32 bits of the source address in Host
[63:48] 16 reserved Reserved
[47:32] 16 len

Packet Length. Length of the data to be fetched for this descriptor.

This is also the packet length since in internal mode, a packet cannot span multiple descriptors.

The maximum length of the packet can be 64K-1 bytes.

[31:0] 32 metadata

Metadata. QDMA passes this field on the H2C-ST TUSER along with the data on every beat. For a queue in internal mode, it can be used to pass messages from SW to user logic along with the data.

This H2C descriptor format is only applicable for internal mode. For bypass mode, the user logic can define its own format as needed by the user application.