IP Configuration - 3.3 English

Versal ACAP CPM DMA and Bridge Mode for PCI Express Product Guide (PG347)

Document ID
PG347
Release Date
2022-11-02
Version
3.3 English
  1. Make the connections between the IP cores as shown in following figure.
  2. Set GT_REFCLK_D, GT_PCIEA0_RX, GT_PCIEA0_TX,SYS_CLK0, and CH0_DDR4_0 as primary ports. To do so:
    1. Select pins gt_refclk0, and PCIE0_GT of versal_cips_0, SYS_CLK0 and CH0_DDR4_0 of axi_noc_0 by pressing Ctrl+click.
    2. Click the Make External (Ctrl + T) icon in the toolbar at the top of the canvas.
  3. Connect NoC/CIPS ports as shown in picture.
  4. Connect "pl0_ref_clk" from CIPS output to "dma0_intrfc_clk" CIPS Input (DMA input clock)
  5. Add a Constant IP, and configure the IP to generate a constant value of logic 1 and connect to dma0_intrfc_resetn input reset port..