Interrupt Interface - 3.4 English

Versal Adaptive SoC CPM DMA and Bridge Mode for PCI Express Product Guide (PG347)

Document ID
PG347
Release Date
2023-11-20
Version
3.4 English
Table 1. Interrupt Interface
Signal Name Direction Description
dma0_usr_irq_req[NUM_USR_IRQ-1:0] I Assert to generate an interrupt. Maintain assertion until interrupt is serviced.
dma0_usr_irq_ack[NUM_USR_IRQ-1:0] O Indicates that the interrupt has been sent on PCIe. Two acks are generated for legacy interrupts. One ack is generated for MSI interrupts.
dma0_usr_irq_func[7:0] I In most cases these signals are tied to 0s for function 0.

NUM_USR_IRQ is selectable and it ranges from 0 to 15. Each bits in dma0_usr_irq_reqbus corresponds to the same bits in dma0_usr_irq_ack. For example, dma0_usr_irq_ack[0] represents an ack for dma0_usr_irq_req[0].