- Engineering Silicon (ES) is not supported for VC1902, VC1802 and VM1802
devices. Only production silicon is supported for these devices.
- PCIe features incompatible with Tandem Configuration:
- PCIe Extended Configuration Space, as this requires PL logic.
- QDMA multi-function is not supported. This feature uses PL mailbox which
will be probed during driver load.
- Stage 1 and stage 2 PDI images must remain linked. If you update one, update
the other to ensure both stages have been generated from the same implemented
- Do not reload the same or a new stage 2 image on the fly. Isolation circuitry
on the periphery of the CPM is designed to ensure safe operation of the PCI Express endpoints prior to the rest of the device
becoming active. Upon stage 2 completion, this isolation is released and it is not
re-enabled for a dynamic reload of the stage 2 image.
- For the Versal architecture, CPM Tandem PROM configuration can
be used with post configuration flash update. This is different from previous
(UltraScale+ and older)
architectures that did not support Tandem PROM post configuration flash update.
Given the lack of dual-mode configuration pins, there is no PERSIST requirement to
keep a configuration port active.
- Tandem Configuration will be compatible with most Dynamic Function eXchange
(DFX) solutions but this capability is not yet implemented as of Vivado 2022.2. Care
must be taken to keep any DFX Pblock away from the PS-PL boundary where soft logic
associated with the CIPS is placed.
- At this point there is no “Tandem with Field Updates” predefined use case. You can
create a “Tandem + DFX” solution noted above where both features are enabled in the
same design, but creation of the design hierarchy and floorplan as well as insertion
of any decoupling logic are the responsibility of the designer. The dynamic (DFX)
portion of the solution would be limited to programmable logic and NoC resources,
and not parts of the Scalar Engines (processors).
- The CPM itself (and therefore Tandem Configuration) is not compatible with the
Classic SoC Boot flow, which utilizes DFX to separate PS and PL configuration
events. This is because the CPM solution requires soft logic for most configurations
and thus the DFX region cannot be constructed to include all of the programmable