Mailbox IP - 3.4 English

Versal Adaptive SoC CPM DMA and Bridge Mode for PCI Express Product Guide (PG347)

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3.4 English

You need to add a new IP from the IP catalog to instantiate pcie_qdma_mailox Mailbox IP. This IP is needed for function virtualization. pcie_qdma_mailbox IP should be connected to the versel_cips IP as shown in the following diagram:

Figure 1. CPM4 Mailbox Connection

To connect the Mailbox IP connection, follow these steps.

  • Add PCIe QDMA Mailbox IP. To do so,
    1. Configure the IP for number of PFs (should be same as number of PF selected in QDMA configuration).
    2. Configure the IP for number of VFs in each PF(should be same as number of VF selected in QDMA configuration).
    Note: It is important to match number PFs and VFs to the numbers configured in the QMDA IP. If not, the design will not work.
  • Re-configure NoC IP to add one extra AXI Master port. To do so,
    1. Assign one more AXI clock.
    2. In Outputs tab, assign M00_AXI to aclk2.
    3. In Connectivity tab, select the MM00_AXI pl option for both S00_AXI and SS01_AXIps_pcie.
  • Add AXI SmartConnect IP.
    1. Configure the IP to have one Master, one Slave, one clock, and one reset.

Follow the above diagram to make all necessary connections. Mailbox IP has two clocks, axi_aclk and ip_clk and two resets axi_aresetn and ip_resetn. Connect two clocks and two resets together.

  • Connect dma0_usr_irq from CIPS IP to output of Mailbox IP.
  • Connect dma0_usr_flr from CIPS IP to output of Mailbox IP.
  • Make usr_flr and usr_irq interface in Mailbox IP as external pins.
Note: Mailbox access can be steered to NoC0 or NoC1 port based on CIPS the GUI configuration. You should configure the NoC based on the CIPS GUI selection.