You need to add a new IP from the IP catalog to instantiate
pcie_qdma_mailox Mailbox IP. This IP is needed for
should be connected to the
versel_cips IP as shown
in the following diagram:
To connect the Mailbox IP connection, follow these steps.
- Add PCIe QDMA Mailbox IP. To do so,
Note: It is important to match number PFs and VFs to the numbers configured in the QMDA IP. If not, the design will not work.
- Configure the IP for number of PFs (should be same as number of PF selected in QDMA configuration).
- Configure the IP for number of VFs in each PF(should be same as number of VF selected in QDMA configuration).
- Re-configure NoC IP to add one extra AXI
Master port. To do so,
- Assign one more AXI clock.
- In Outputs tab, assign M00_AXI to aclk2.
- In Connectivity tab, select the MM00_AXI pl option for both S00_AXI and SS01_AXIps_pcie.
- Add AXI SmartConnect IP.
- Configure the IP to have one Master, one Slave, one clock, and one reset.
Follow the above diagram to make all necessary connections. Mailbox
IP has two clocks,
ip_clk and two resets
two clocks and two resets together.
dma0_usr_irqfrom CIPS IP to output of Mailbox IP.
dma0_usr_flrfrom CIPS IP to output of Mailbox IP.
usr_irqinterface in Mailbox IP as external pins.