QDMA Functional Mode - 3.4 English

Versal Adaptive SoC CPM DMA and Bridge Mode for PCI Express Product Guide (PG347)

Document ID
PG347
Release Date
2023-11-20
Version
3.4 English
  • AXI4-Stream Interfaces
  • AXI4 Memory Mapped Interfaces
  • 64-bit PCIe addresses
  • 48-bit AXI MM addresses
  • 10-bit tag support with maximum outstanding 512 PCIe tags
  • MSI-X Interrupt type supported
  • Descriptor input interface
  • Descriptor output interface
  • Root Port support (in AXI Bridge Mode)
  • Endpoint support
  • 4096 Descriptor rings
  • 4096 CMPT rings
  • Programmable ring sizes for descriptor and CMPT rings
  • Per queue PASID
  • 4096 functions (Up to 4 physical functions (PFs) and 240 virtual functions (VFs))*
  • Function level reset
  • Interrupt coalescing
  • A total of 8192 MSI-X vectors
Note: pcie_qdma_mailbox IP support is only up to 4PF and 240VF's.