Simulation - 3.4 English

Versal Adaptive SoC CPM DMA and Bridge Mode for PCI Express Product Guide (PG347)

Document ID
PG347
Release Date
2023-11-20
Version
3.4 English
Simulation example designs are listed in the configurable example design (CED). You can download the simulation example design from the Vivado store Versal_CPM5_QDMA_Simultion_Design. The list of Versal PCIe example designs are available here. Simulation design has a fixed configuration as follows:
  • Gen4x8
  • AXI4 and AXI-ST
  • 4 PF and 250 VF's
  • Each Function with two BAR's. One for QDMA configuration space and one for Bypass access to PL.
  • Descriptor bypass and Internal Mode

Following is the procedure to generate a CPM5 QDMA simulation design:

  1. Open Vivado and select Open Example Project option under Quick Start.

  2. From the Template options, select Versal CPM5 QDMA Simulation Design under PCIe section. You can see the corresponding diagram on the right-hand side description section. click Next.

    The Vivado wizard guides you through the board/part section. This example design is fixed to VPK120 board.

  3. Select the project name and directory and click Next to generate project.
  4. A new simulation project is displayed as shown below.

    This project has cpm_qdma (EP design) and design_rp (root port model). And all the relevant files that are need for simulation.