Soft Reset - 3.4 English

Versal Adaptive SoC CPM DMA and Bridge Mode for PCI Express Product Guide (PG347)

Document ID
PG347
Release Date
2023-11-20
Version
3.4 English

Reset the QDMA logic through the dma0_soft_reset_n port. This port needs to be held in reset for a minimum of 100 clock cycles (pcie0_user_clk cycles).

This signal resets only the DMA portion of logic. It does not reset the PCIe hard block.

Soft Reset Use Cases

The uses cases that prompt the use of dma0_soft_reset include:
  • DMA does not respond, and the user application is not getting proper values.
  • DMA transfer has errors, but the PCIe links are good.
  • DMA records some asynchronous errors.
After dma0_soft_reset, you must reinitialize the queues and program all queue context.