Tutorial Design File - 3.3 English

Versal ACAP CPM DMA and Bridge Mode for PCI Express Product Guide (PG347)

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3.3 English

Before running the lab, download the top_impl.xdc constraints file available in the reference design file. To do so:

  1. Download the reference design file from the Xilinx website.
  2. Extract the ZIP file contents into any write-accessible location.
  3. Locate the top_impl.xdc constraints file.

The provided top_impl.xdc constraints file contains the needed DDR pins and their placement for this tutorial lab. The constraints file can be modified as needed for later use.