Architecture - 1.2 English

HDMI 2.1 Transmitter Subsystem Product Guide (PG350)

Document ID
PG350
Release Date
2022-04-27
Version
1.2 English

The subsystem driver provides an easy-to-use, well-defined API to help integrate the subsystem in an application without having to understand the underlying complexity of configuring each and every sub-core.

The subsystem driver consists of the following:

Subsystem layer
Queries exported hardware to determine the subsystem hardware configuration and pull-in sub-core drivers, at build time. It abstracts sub-core drivers, which interface with hardware at register level, into a set of functional APIs. The subsystem driver uses these APIs to dynamically manage the data flow through processing elements.
Sub-core drivers
Every included sub-core has a driver associated with it that provides APIs to interface with the core hardware.

The following figure shows the HDMI 2.1 TX Subsystem architecture.

Figure 1. Subsystem Driver Architecture

The HDMI 2.1 TX Subsystem is a MAC subsystem which works with a HDMI PHY Controller /HDMI GT Subsystem (PHY) to create a video connectivity system. The HDMI 2.1 TX Subsystem is tightly coupled with the Xilinx HDMI PHY Controller /HDMI GT Subsystem, which itself is independent and offers flexible architecture with multiple-protocol support. Both MAC and PHY are dynamically programmable through the AXI4-Lite interface.

Figure 2. MAC Interfaces with PHY