Callbacks from HDMI 2.1 TX Interrupt Controlling Layer - 1.2 English

HDMI 2.1 Transmitter Subsystem Product Guide (PG350)

Document ID
PG350
Release Date
2022-04-27
Version
1.2 English

The following table shows the interaction between the HDMI 2.1 TX Interrupt controlling layer and the pass-through application. The user can use or modify the callbacks as per their requirement.

Table 1. HDMI 2.1 TX Interrupt Controller Layer Callback Handlers
HDMI 2.1 Interrupt Controller Layer Callback Handlers Description
XV_TX_TRIG_HANDLER_CONNECTION_CHANGE TX cable has been plugged in or plugged out ; this allows the pass-through application to make a decision of passing the rx data to tx or setting up the Test Pattern Generator
XV_TX_TRIG_HANDLER_SETUP_TXREFCLK Programs the TX reference clock using a system i2c
XV_TX_TRIG_HANDLER_SETUP_AUDVID Configures the video and audio sources and any software buffers
XV_TX_TRIG_HANDLER_STREAM_ON TX is ready to transmit stream data
XV_TX_TRIG_HANDLER_ENABLE_CABLE_DRIVERS Configure the drivers that interface between the board and HDMI cable, for example dp159.
XV_TX_TRIG_HANDLER_VSYNC_RECV Vsync received on TX ; this allows for any operations to be performed, for example forwarding any data in a software buffer (such as info frames).
XV_TX_TRIG_HANDLER_STREAM_OFF TX stream is down
XV_TX_TRIG_HANDLER_HDCP_FORCE_BLANKING Request to disable sending HDCP decrypted content.
XV_TX_GET_FRL_CLOCK Get FRL clock for TX ; this clock can be received from the receiver or an external source.