Running the Reference Design (MicroBlaze) - 1.2 English

HDMI 2.1 Transmitter Subsystem Product Guide (PG350)

Document ID
PG350
Release Date
2022-04-27
Version
1.2 English

Use the following steps to execute the system using generated bitstream and software elf from the example design.

  1. Launch the Xilinx System Debugger by selecting Start > All Programs > Xilinx Design Tools > Vivado <version> > Vivado <version> Tcl Shell.
  2. In the Xilinx command shell window, change to the Example Design Project directory:
    Vivado% cd ./<IP instance name>_ex
  3. Invoke Xilinx System Debugger (xsdb).
    Vivado% xsdb
  4. Establish connections to debug targets.
    xsdb% connect
  5. Download the bitstream to the FPGA.
    xsdb% fpga -file ./<IP instance name>_ex.runs/impl_1/exdes_wrapper.bit
  6. Set the target processor.
    xsdb% target
      1* xcvu9p
      2  MicroBlaze Debug Module at USER2
      3  MicroBlaze #0 (Running)
    xsdb% target -set 3
  7. Download the software .elf to the FPGA.
    xsdb% dow ./<vitis_workspace>/<application_name>_1/Debug/<application_name>_1.elf
  8. Run the software.
    xsdb% stop
    xsdb% rst
    xsdb% con
  9. Exit the XSDB command prompt.
    xsdb% exit